General Description
The FIN3385 and FIN3383 transform 28 bit wide parallel LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock 28 bits of input LVTTL data are sampled and transmitted.

Features
■ Low power consumption
■ 20 MHz to 85 MHz shift clock support
■ r1V common-mode range around 1.2V
■ Narrow bus reduces cable size and cost
■ High throughput (up to 2.38 Gbps throughput)
■ Internal PLL with no external component
■ Compatible with TIA/EIA-644 specification
■ Devices are offered 56-lead TSSOP packages