L9679P datasheet(65/272 Pages) STMICROELECTRONICS

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L9679P

SPI interfaces

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7.3

Global SPI tables

A summary of all the registers contained within the global SPI map are shown below and are

referenced throughout the specification as they apply. The SPI register tables also specify

the effect of the internal reset signals assertion on each bit field (the symbol '-' is used to

indicate that the register is not affected by the relevant reset signal').

Global SPI global status word

The Global SPI of L9679P contains an 11-bit word that returns global status information.

The Global Status Word (GSW) of the Global SPI is the most significant 11 bits of MISO_G

data.

Table 7. Global SPI Global Status Word

MISO_G GSW

Name

POR WSM SSM

Description

SPIFLT

SPI Fault, set if previous SPI frame had wrong parity check

or wrong number of bits, cleared upon read

0 No fault

1 Fault

DEPOK

General Deployment Successful Flag, logical OR of the

corresponding CHxDS bits (bit 15) in DSRx Registers

0 All the DSRx-CHDS bits are 0

1 At least one of the DSRx-CHDS bits is 1

Unused

WDT/TM_S

State of WDT/TM pin

0 WDT/TM=0

1 WDT/TM=1

ERSTATE

Set when Powermode state machine is in ER state

0 Powermode state machine is not in ER state

1 Powermode state machine is in ER state

POWERFLT

Fault present in Power State Register, logical OR between

bits from 18 to 9 of POWER_STATE Register

0 All the bits from 18 to 9 in the POWER_STATE Registers

are 0s

1 At least one of the bits from 18 to 9 in the

POWER_STATE Registers is 1

FLT

Fault present in Fault Status Register (FLTSR), logical OR

between all bits of FLTSR

0 All the bits in the Fault Status Register (FLTSR) are 0s

1 At least one of the bits in the Fault Status Register

(FLTSR) is 1

CONVRDY2

ADC Conversion of request C or D has been completed so

new results are available

0 No new data available

1 New data available

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