AD8451 datasheet(28/33 Pages) AD

28 / 33 page

Data Sheet

AD8451

Table 6. AD8451-EVALZ Test Switches and Functions

Switch

Function

Operation

Default

Position

MODE

Selects the charge or the discharge

mode.

The MODE switch selects CHG (logic high) or DISCH (logic low).

CHG

RUN_TEST1 Selects between the user inputs and

the 2.5 V AD8451 reference voltage.

The AD8451 operates normally when the RUN_TEST1 switch is in the RUN

position. When in the TEST position, 2.5 V is applied to the ISET and VSET inputs.

RUN

RUN_TEST2 Tests the CC or CV loop filter

amplifiers.

The voltage at the VCTRL output (TPVCTRL) for all positions is 0 V when

RUN_TEST1 is in RUN position and 2.5 V when RUN_TEST1 in TEST position.

RUN

ISREF_HI

The ISREF_HI switch connects

Pin 74 (ISREFH) to the internal 2.5 V

reference (2.5 position) or to the

SMA connector EXT (the external

input for a user defined VREF input).

When in the 2.5V position, the ISREF_HI switch connects Pin 74 (ISREFH, an

internal 100 kΩ resistor) to Pin 73 (VREF, the 2.5 V reference). When the

ISREF_LO switch is in the NORM position, the output at Pin 71 (ISMEA)

shifts positive by 20 mV.

EXT

ISREF_LO

Connects Pin 76 (ISREFL) to ground

(NORM) or to the ISREFL SMA input

connector.

When in the NORM position and the ISREF_HI switch is in the EXT position,

there is no offset applied to the ISMEA output. When in the EXT position,

the ISREFLO SMA is selected.

NORM

EVALUATING THE AD8451

Test the Instrumentation Amplifier

Connect the TPISVN jumper to ground, and then apply

100 mV dc to TPISVP. Measure 2.6 V at the TPISMEA output.

Subtract any offset voltages from the output reading before

calculating the gain.

20 mV Offset at IMEAS Output

Connect a jumper from TPISVP to TPISVN to ground by using

another jumper and any one of the convenient black test loops.

Measure 0 V ± 2.86 mV at the TPISMEA output (that is, the IA

residual offset voltage multiplied by gain). Move the ISREFLO

switch to the EXT position, and the ISREFHI switch to the

20 mV (EXT) position. The output will then increase by 20 mV.

Test the Difference Amplifier

Insert a shorting jumper at Header GND_BVN. With 1 V dc

applied to TPBVP, measure 0.8 V at TPBVMEA. For the most

accurate gain measurement, subtract the offset voltage from the

output voltage before calculating gain.

5 mV Offset at BVMEAS Output

Insert jumpers in the GND_BVP and GND_BVN headers.

Measure 0 V ± 0.4mV at the TPBVMEA output (that is, the DA

residual offset voltage multiplied by gain). Connect a jumper

between TPBREFH and TP2.5V. The output will then increase

by 5 mV.

CC and CV Integrator Tests

Switches RUN_TEST1 and RUN_TEST2 set up the required

circuit conditions to test the integrators. RUN_TEST1 disconnects

the external inputs ISET and VSET and applies 2.5 V dc from

the reference, simultaneously, to both of the CC and CV.

RUN_TEST2 has three positions: RUN, TEST_CC, and

TEST_CV.

Loop Compensation

The AD8451-EVALZ is suitable for use as a test platform for

system loop compensation experiments. However, before

installing the platform in a system, component changes are necessary.

Note the four compensation networks, CC-CHARGE, CC-

DISCHARGE, CV-CHARGE, and CV-DISCHARGE, located

on the right-hand side of the schematic shown in Figure 52. To

make it easier to locate these components, the configuration of

these networks on the AD8451-EVALZ PCB approximates that

shown in the schematic (see Figure 52). Each of the components

locations accommodates both standard, 1206 size, surface-mount

chip resistors and capacitors or leaded components inserted into

the pairs of TP thru holes spanning the SM footprints. The TP

holes accept the popular 0.025” test pins if leaded devices are

preferred for multiple loop tests.

As shipped, CC and CV loop amplifier filters are configured as

voltage followers by replacing feedback capacitors to the inverting

inputs with resistors, and removing the dc coupling resistors from

the IA and DA outputs. The feedback loops must be reconfigured

to close the loops to operate as precision feedback loops.

Loop compensation requires knowledge of the output dc-to-dc

power converter. It is assumed that the AD8451 is most often

used with a switching converter. The scope and breadth of this

switching converter design architecture is quite broad, and a

thorough discussion of all the types and variants of this type of

converter is well beyond the scope of this data.

When the circuit and component details of the power converter

are known, proceed with a calculation of the loop parameters

and components, and the values necessary to achieve loop

compensation.

Because the loop is of the type proportional/integrating (PI), a

direct dc path is required from the IA and DA amplifiers to the

error inputs of the CC and CV loop amplifiers. Install these

resistors at the R1, R6, R7, R11, and R12 locations.

Likewise, the CC and CV amplifiers must be reconfigured from

voltage followers to integrators by replacing the 0 Ω capacitors

at C6, C10, C11, C19, and C24 with appropriate capacitors.

Rev. 0 | Page 27 of 32

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