データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

CYUSB302X データシート(PDF) 17 Page - Cypress Semiconductor

部品番号 CYUSB302X
部品情報  SD3??USB and Mass Storage Peripheral Controller
PDF  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  CYPRESS [Cypress Semiconductor]
ホームページ  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYUSB302X データシート(HTML) 17 Page - Cypress Semiconductor

Back Button CYUSB302X Datasheet HTML 13Page - Cypress Semiconductor CYUSB302X Datasheet HTML 14Page - Cypress Semiconductor CYUSB302X Datasheet HTML 15Page - Cypress Semiconductor CYUSB302X Datasheet HTML 16Page - Cypress Semiconductor CYUSB302X Datasheet HTML 17Page - Cypress Semiconductor CYUSB302X Datasheet HTML 18Page - Cypress Semiconductor CYUSB302X Datasheet HTML 19Page - Cypress Semiconductor CYUSB302X Datasheet HTML 20Page - Cypress Semiconductor CYUSB302X Datasheet HTML 21Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 34 page
background image
Document Number: 001-55190 Rev. *L
Page 17 of 34
CYUSB302x
tSDOS CMD
Host output setup time for CMD
6
–
ns
tSDOS DAT
Host output setup time for DAT
6
–
ns
tSDOH CMD
Host output hold time for CMD
2
–
ns
tSDOH DAT
Host output hold time for DAT
2
–
ns
tSCLKR
Clock rise time
–
2
ns
tSCLKF
Clock fall time
–
2
ns
tSDCK
Clock cycle time
20
–
ns
SDFREQ
Clock frequency
–
50
MHz
tSDCLKOD
Clock duty cycle
40
60
%
SD-SDR50
tSDIS CMD
Host input setup time for CMD
1.5
–
ns
tSDIS DAT
Host input setup time for DAT
1.5
–
ns
tSDIH CMD
Host input hold time for CMD
2.5
–
ns
tSDIH DAT
Host input hold time for DAT
2.5
–
ns
tSDOS CMD
Host output setup time for CMD
3
–
ns
tSDOS DAT
Host output setup time for DAT
3
–
ns
tSDOH CMD
Host output hold time for CMD
0.8
–
ns
tSDOH DAT
Host output hold time for DAT
0.8
–
ns
tSCLKR
Clock rise time
–
2
ns
tSCLKF
Clock fall time
–
2
ns
tSDCK
Clock cycle time
10
–
ns
SDFREQ
Clock frequency
100
MHz
tSDCLKOD
Clock duty cycle
40
60
%
SD-DDR50
tSDIS CMD
Host input setup time for CMD
4
–
ns
tSDIS DAT
Host input setup time for DAT
0.92
–
ns
tSDIH CMD
Host input hold time for CMD
2.5
–
ns
tSDIH DAT
Host input hold time for DAT
2.5
–
ns
tSDOS CMD
Host output setup time for CMD
6
–
ns
tSDOS DAT
Host output setup time for DAT
3
–
ns
tSDOH CMD
Host output hold time for CMD
0.8
–
ns
tSDOH DAT
Host output hold time for DAT
0.8
–
ns
tSCLKR
Clock rise time
–
2
ns
tSCLKF
Clock fall time
–
2
ns
tSDCK
Clock cycle time
20
–
ns
SDFREQ
Clock frequency
50
MHz
tSDCLKOD
Clock duty cycle
45
55
%
Table 9. S-Port Timing Parameters[3] (continued)
Parameter
Description
Min
Max
Units
Note
3. All parameters guaranteed by design and validated through characterization.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com