CY7C1069G datasheet(9/20 Pages) CYPRESS

部品番号	CY7C1069G

部品情報	16-Mbit (2M words 횞 8 bit) Static RAM with Error-Correcting Code (ECC)

PDF	20 Pages

Scroll/Zoom	100%

メーカー	CYPRESS [Cypress Semiconductor]

ホームページ	http://www.cypress.com

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9 / 20 page

Document Number: 001-81539 Rev. *J

Page 9 of 20

CY7C1069G

CY7C1069GE

Data Retention Characteristics

Over the Operating Range of –40

C to 85 C

Parameter

Description

Conditions

Min

Max

Unit

VDR

VCC for data retention

–

1.0

–

ICCDR

Data retention current

VCC = VDR, CE > VCC – 0.2 V [13],

VIN > VCC – 0.2 V or VIN < 0.2 V

–30.0

tCDR[14]

Chip deselect to data retention

time

–0

–

tR[14, 15]

Operation recovery time

VCC > 2.2 V

10.0

–

VCC < 2.2 V

15.0

–

Data Retention Waveform

Figure 6. Data Retention Waveform [13]

tCDR

VDR = 1.0 V

DATA RETENTION MODE

VCC(min)

VCC

Notes

13. For all dual chip enable devices, CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW,

CE is HIGH.

14. This parameter is guaranteed by design and is not tested.

15. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 100 s or stable at VCC(min.) > 100 s.

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