CY2VC511 datasheet(1/7 Pages) CYPRESS

部品番号	CY2VC511

部品情報	27 MHz Clock Generator with VCXO

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メーカー	CYPRESS [Cypress Semiconductor]

ホームページ	http://www.cypress.com

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PRELIMINARY

CY2VC511

27 MHz Clock Generator with VCXO

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document Number: 001-10796 Rev. *D

Revised May 14, 2010

Features

■ Generates 27 MHz Output Clock

■ Uses 27 MHz LVCMOS Reference Clock

■ LVCMOS Output

■ VCXO with 230 ppm Minimum Pull Range

■ Fully Integrated Low Noise Phase Locked Loop (PLL)

■ Linear Voltage-to-Frequency Control Curve

■ Supply Voltage: 3.3V

■ Pb-free 16-Pin TSSOP Package

Description

The CY2VC511 is a PLL based clock generator with VCXO

control. It takes a low swing 27 MHz reference clock, and

generates an adjustable 27 MHz output clock. The device has a

single LVCMOS output and operates from a 3.3V power supply.

The VIN pin is an analog input that enables the user to pull the

output frequency. The pullability range is at least 230 ppm (±115

ppm). The pull curve is very linear.

Unlike conventional VCXO designs, the output frequency

adjustment is achieved by a proprietary PLL design. This permits

the use of 27 MHz clock reference.

VIN

LOW -NOISE

PLL

REFIN

CLK

Logic Block Diagram

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