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TC58FVB160AXB データシート(PDF) 20 Page - Toshiba Semiconductor

部品番号 TC58FVB160AXB
部品情報  TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
PDF  41 Pages
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メーカー  TOSHIBA [Toshiba Semiconductor]
ホームページ  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC58FVB160AXB データシート(HTML) 20 Page - Toshiba Semiconductor

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TC58FVT160/B160AFT/AXB-70,-10
2002-08-06
20/41
COMMAND WRITE/PROGRAM/ERASE CYCLE
−70
−10
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
tCMD
Command Write Cycle Time
70
100
ns
tAS
Address Set-up Time / BYTE Set-up Time
0
0
ns
tAH
Address Hold Time / BYTE Hold Time
35
50
ns
tAHW
Address Hold Time from WE High level
20
20
ns
tDS
Data Set-up Time
35
50
ns
tDH
Data Hold Time
0
0
ns
tWELH
WE Low-Level Hold Time
( WE Control)
35
50
ns
tWEHH
WE High-Level Hold Time
( WE Control)
20
20
ns
tCES
CE
Set-up Time to WE Active
( WE Control)
0
0
ns
tCEH
CE
Hold Time from WE High Level
( WE Control)
0
0
ns
tCELH
CE
Low-Level Hold Time
( CE Control)
35
50
ns
tCEHH
CE
High-Level Hold Time
( CE Control)
20
20
ns
tCHW
CE
Hold Time from WE High Level
20
20
ns
tWES
WE Set-up time to CE Active
( CE Control)
0
0
ns
tWEH
WE Hold Time from CE High Level
( CE Control)
0
0
ns
tOES
OE
Set-up Time
0
0
ns
tOEHP
OE
Hold Time (Toggle, Data Polling)
90
90
ns
tOEHT
OE
High-Level Hold Time (Toggle)
20
20
ns
tBEH
Erase Hold Time
50
50
µs
tVDS
VDD Set-up Time
500
500
µs
Program/Erase Valid to
BY
/
RY
Delay
90
90
ns
tBUSY
Program/Erase Valid to
BY
/
RY
Delay during Suspend Mode
300
300
ns
tRP
RESET
Low-Level Hold Time
500
500
ns
tREADY
RESET
Low-Level to Read Mode
20
20
µs
tRB
BY
/
RY
Recovery Time
0
0
ns
tRH
RESET
Recovery Time
50
50
ns
tCEBTS
CE
Set-up time BYTE Transition
5
5
ns
tBTD
BYTE to Output High-Z
30
30
ns
tSUSP
Program Suspend Command to Suspend Mode
1.5
1.5
µs
tRESP
Program Resume Command to Program Mode
1
1
µs
tSUSE
Erase Suspend Command to Suspend Mode
15
15
µs
tRESE
Erase Resume Command to Erase Mode
1
1
µs



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