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AM29PL320DT60RWPI データシート(PDF) 23 Page - SPANSION

部品番号 AM29PL320DT60RWPI
部品情報  32 Megabit (2 M x 16-Bit/1 M x 32-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory
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AM29PL320DT60RWPI データシート(HTML) 23 Page - SPANSION

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October 2, 2003
Am29PL320D
21
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to pro-
gram bytes or words to the device faster than using the
standard program command sequence. The unlock by-
pass command sequence is initiated by first writing
two unlock cycles. This is followed by a third write cycle
containing the unlock bypass command, 20h. The de-
vice then enters the unlock bypass mode. A two-cycle
unlock bypass program command sequence is all that
is required to program in this mode. The first cycle in
this sequence contains the unlock bypass program
command, A0h; the second cycle contains the pro-
g r am addres s and data. Addit i onal data is
programmed in the same manner. This mode dis-
penses with the initial two unlock cycles required in the
standard program command sequence, resulting in
faster total programming time. Table 13 shows the re-
quirements for the command sequence.
During the unlock bypass mode, only the Unlock By-
pass Program and Unlock Bypass Reset commands
are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset com-
mand sequence. The first cycle must contain the data
90h; the second cycle the data 00h. Addresses are
don’t care for both cycles. The device then returns to
reading array data.
Figure 2 illustrates the algorithm for the program oper-
ation. See the Program/Erase Operations table in “AC
Characteristics” for parameters, and to Figure 17 for
timing diagrams.
Note: See Table 13 for program command sequence.
Figure 2.
Program Operation
START
Write Program
Command Sequence
Data Poll
from System
Verify Data?
No
Yes
Last Address?
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress



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