USB

Type A

X in trace

USB

Type A

X in trace

TUSB1002A

Y in trace

USB Host

USB Host

15

TUSB1002A

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7.3 Feature Description

7.3.1 4-Level Control Inputs

The TUSB1002A has (MODE, CFG1, CFG2, CH1_EQ1, CH1_EQ2, CH2_EQ1, and CH2_EQ2) 4-level inputs

pins that are used to control the equalization gain and the output voltage swing dynamic range. These 4-level

inputs use a resistor divider to help set the 4 valid levels and provide a wider range of control settings. These

resistors together with the external resistor connection combine to achieve the desired voltage level.

Table 1. 4-Level Control Pin Settings

LEVEL

SETTINGS

0

Option 1: Tie 1 k

Ω 5% to GND.

Option 2: Tie directly to GND.

R

Tie 20 k

Ω 5% to GND.

F

Float (leave pin open)

1

Option 1: Tie 1 k

NOTE

In order to conserve power, the TUSB1002A disables 4-level input’s internal pull-up/pull-

down resistors after the state of 4-level pins have been sampled on rising edge of EN. A

change of state for any four level input pin is not applied to TUSB1002A until after EN pin

transitions from low to high.

7.3.2 Linear Equalization

With a linear equalizer, the TUSB1002A can electrically shorten a particular channel allowing for longer run

lengths.

Figure 16. Linear Equalizer

With a TUSB1002A, a longer trace can be made to have similar insertion loss as a shorter trace. For example, a

long trace of X + Y inches can be made to have similar loss characteristics of a shorter trace of X inches.

The receiver equalization level for each channel is determined by the state of the CHx_EQ1 and CHx_EQ2 pins,

where x = 1 or 2.