MP2143H – 3A, 5.5V, 2.0MHz, SYNCHRONOUS STEP-DOWN SWITCHER

MP2143H Rev. 1.02

www.MonolithicPower.com

13

6/30/2016

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Selecting the Output Capacitor

The output capacitor (C2) maintains the output

DC voltage. Use ceramic capacitors. Low-ESR

capacitors keep the output voltage ripple low.

The output voltage ripple can be estimated by:

OUT

OUT

OUT

ESR

S1

IN

S

VV

1

V1

R

fL

V

8 f

C2







 









 

 

equivalent series resistance of the output

capacitor.

Using ceramic capacitors, the impedance at the

switching frequency is dominated by the

capacitance. The output voltage ripple is mainly

caused by the capacitance. For simplification,

the output voltage ripple can be estimated by:

OUT

OUT

OUT

2

IN

S1

VV

ΔV1

V

8f

L

C2



 



 



For tantalum or electrolytic capacitors, the ESR

dominates the impedance at the switching

frequency. For simplification, the output ripple

can be approximated as:

OUT

OUT

OUT

ESR

IN

S1

VV

ΔV1

R

fL

V



 









The characteristics of the output capacitor also

affect the stability of the regulation system.

PCB Recommendation of MP2143H

Proper layout of the switching power supplies is

very important, and sometimes critical for

proper operation. For high-frequency switching

converters, poor layout could lead to poor line

or load regulation and stability issues.

The high current paths (GND, VIN, and SW)

should be placed very close to the device using

short, direct, and wide traces. The input

capacitor needs to be as close as possible to

the VIN and GND pins. The external feedback

resistors should be placed next to the FB pin.

Keep the switching node SW short and away

from the feedback network.

1

6

5

7

8

9

10

4

3

2

VOUT

SW

VIN

GND

GND

R1

R2

C1

C2

Top Layer

Bottom Layer

Figure 3: Layout Recommendation