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データシートサーチシステム |
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DM54LS191 データシート(PDF) 3 Page - National Semiconductor (TI) |
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DM54LS191 データシート(HTML) 3 Page - National Semiconductor (TI) |
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3 / 8 page  ’LS190 and ’LS191 Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) From (Input) RL e 2kX Symbol Parameter To (Output) CL e 15 pF CL e 50 pF Units Min Max Min Max fMAX Maximum Clock 20 20 MHz Frequency tPLH Propagation Delay Time Load to 33 43 ns Low to High Level Output Any Q tPHL Propagation Delay Time Load to 50 59 ns High to Low Level Output Any Q tPLH Propagation Delay Time Data to 22 26 ns Low to High Level Output Any Q tPHL Propagation Delay Time Data to 50 62 ns High to Low Level Output Any Q tPLH Propagation Delay Time Clock to 20 24 ns Low to High Level Output Ripple Clock tPHL Propagation Delay Time Clock to 24 33 ns High to Low Level Output Ripple Clock tPLH Propagation Delay Time Clock to 24 29 ns Low to High Level Output Any Q tPHL Propagation Delay Time Clock to 36 45 ns High to Low Level Output Any Q tPLH Propagation Delay Time Clock to 42 47 ns Low to High Level Output MaxMin tPHL Propagation Delay Time Clock to 52 65 ns High to Low Level Output MaxMin tPLH Propagation Delay Time UpDown to 45 50 ns Low to High Level Output Ripple Clock tPHL Propagation Delay Time UpDown to 45 54 ns High to Low Level Output Ripple Clock tPLH Propagation Delay Time DownUp to 33 36 ns Low to High Level Output MaxMin tPHL Propagation Delay Time DownUp to 33 42 ns High to Low Level Output MaxMin tPLH Propagation Delay Time Enable to 33 36 ns Low to High Level Output Ripple Clock tPHL Propagation Delay Time Enable to 33 42 ns High to Low Level Output Ripple Clock 3 |
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