MP6302 datasheet(10/12 Pages) MPS

10 / 12 page

MP6302 – ENERGY STORAGE AND RELEASE CONTROL IC

MP6302 Rev. 1.02

www.MonolithicPower.com

7/17/2015

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

The necessary storage capacitance can be

estimated by:

RELEASE

HOLD

STORAGE

RELEASE

−

Here, IRELEASE : release current

VRELEASE : release voltage

THOLD : Hold up time

VSTORAGE : voltage on CSTORAGE

For example, if IRELEASE=0.5A, THOLD=20ms,

VSTORAGE=8.5V,

VRELEASE=4.2V

the

needed

storage capacitance is around 2200μF.

PCB Layout Guide

PCB layout is important to achieve good

performance operation for MP6302. Follow

guidelines below and use the EVB board layout

as a reference.

1) Connect the BST pin as close as possible to

the SW node of DCDC converter through a

resistor and a small ceramic capacitor. Try

to avoid interconnect the feedback path.

2) Ensure all feedback connections are short

and direct. Place the feedback resistors and

compensation components as close to the

chip as possible.

3) Keep the connection of the storage

capacitors and STRG pin as short and wide

as possible.

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