データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

LT6235IGN データシート(PDF) 17 Page - Linear Technology

部品番号 LT6235IGN
部品情報  60MHz, Rail-to-Rail Output, 1.9nV / SIGME Hz, 1.15mA Op Amp Family
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  LINER [Linear Technology]
ホームページ  http://www.linear.com
Logo LINER - Linear Technology

LT6235IGN データシート(HTML) 17 Page - Linear Technology

Back Button LT6235IGN Datasheet HTML 13Page - Linear Technology LT6235IGN Datasheet HTML 14Page - Linear Technology LT6235IGN Datasheet HTML 15Page - Linear Technology LT6235IGN Datasheet HTML 16Page - Linear Technology LT6235IGN Datasheet HTML 17Page - Linear Technology LT6235IGN Datasheet HTML 18Page - Linear Technology LT6235IGN Datasheet HTML 19Page - Linear Technology LT6235IGN Datasheet HTML 20Page - Linear Technology LT6235IGN Datasheet HTML 21Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 17 / 24 page
background image
17
623345f
LT6233/LT6233-10/
LT6234/LT6235
Input Protection
There are back-to-back diodes, D1 and D2 across the + and
– inputs of these amplifiers to limit the differential input
voltage to
±0.7V. The inputs of the LT6233/LT6234/
LT6235 do not have internal resistors in series with the
input transistors. This technique is often used to protect
the input devices from over voltage that causes excessive
current to flow. The addition of these resistors would
significantly degrade the low noise voltage of these ampli-
fiers. For instance, a 100
Ω resistor in series with each
input would generate 1.8nV/
√Hz of noise, and the total
amplifier noise voltage would rise from 1.9nV/
√Hz to
2.6nV/
√Hz. Once the input differential voltage exceeds
±0.7V, steady state current conducted through the protec-
tion diodes should be limited to
±40mA. This implies 25Ω
of protection resistance is necessary per volt of overdrive
beyond
±0.7V. These input diodes are rugged enough to
APPLICATIO S I FOR ATIO
Amplifier Characteristics
Figure 1 is a simplified schematic of the LT6233/LT6234/
LT6235, which has a pair of low noise input transistors Q1
and Q2. A simple current mirror Q3/Q4 converts the
differential signal to a single-ended output, and these
transistors are degenerated to reduce their contribution to
the overall noise.
Capacitor C1 reduces the unity cross frequency and
improves the frequency stability without degrading the
gain bandwidth of the amplifier. Capacitor CM sets the
overall amplifier gain bandwidth. The differential drive
generator supplies current to transistors Q5 and Q6 that
swing the output from rail-to-rail.
handle transient currents due to amplifier slew rate over-
drive and clipping without protection resistors.
The photo of Figure 2 shows the output response to an
input overdrive with the amplifier connected as a voltage
follower. With the input signal low, current source I1
saturates and the differential drive generator drives Q6
into saturation so the output voltage swings all the way to
V. The input can swing positive until transistor Q2 satu-
rates into current mirror Q3/Q4. When saturation occurs,
the output tries to phase invert, but diode D2 conducts
current from the signal source to the output through the
feedback connection. The output is clamped a diode drop
below the input. In this photo, the input signal generator
is limiting at about 20mA.
With the amplifier connected in a gain of AV ≥ 2, the output
can invert with very heavy overdrive. To avoid this inver-
sion, limit the input overdrive to 0.5V beyond the power
supply rails.
ESD
The LT6233/LT6234/LT6235 have reverse-biased ESD
protection diodes on all inputs and outputs as shown in
Figure 1. If these pins are forced beyond either supply,
unlimited current will flow through these diodes. If the
current is transient and limited to one hundred milliamps
or less, no damage to the device will occur.
Noise
The noise voltage of the LT6233/LT6234/LT6235 is equiva-
lent to that of a 225
Ω resistor, and for the lowest possible
noise it is desirable to keep the source and feedback
resistance at or below this value, i.e. RS + RG||RFB ≤ 225Ω.
Figure 2. VS = ±2.5V, AV = 1 with Large Overdrive
500
µs/DIV
623345 F02
–2.5V
2.5V
0V
Figure 1. Simplified Schematic
ENABLE
DESD6
DESD5
–V
+V
+VIN
–VIN
+V
623345 F01
BIAS
DIFFERENTIAL
DRIVE GENERATOR
VOUT
+V
CM
I1
–V
DESD3
–V
–V
DESD4
+V
DESD1
–V
DESD2
+V
D1
C1
D2
Q5
Q6
Q4
Q2
Q3
Q1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com