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ICS8535-21 データシート(PDF) 9 Page - Integrated Circuit Systems |
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ICS8535-21 データシート(HTML) 9 Page - Integrated Circuit Systems |
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9 / 14 page ![]() 8535AG-21 www.icst.com/products/hiperclocks.html REV. A OCTOBER 20, 2004 9 Integrated Circuit Systems, Inc. ICS8535-21 LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER SCHEMATIC EXAMPLE Figure 3 shows a schematic example of the ICS8535-21. The decoupling capacitors should be physically located near the power pin. For ICS8535-21, the unused clock outputs can be left floating. FIGURE 3. ICS8535-21 LVPECL BUFFER SCHEMATIC EXAMPLE VCC R5 82.5 R3 50 + - CLK0 C1 10uf Optional Termination R4 133 (U1-14) R2 50 Zo = 50 R7 82.5 Zo = 50 CLK1 C2 .1uF Zo = 50 (U1-8) Vcco = 3.3V VCC = 3.3V R1 50 CLK_EN (U1-7) Zo = 50 C4 .1uF R6 133 CLK_SEL + - U2 8535-21 1 2 3 4 5 6 11 8 9 10 12 14 13 7 VEE CLK_EN CLK_SEL CLK0 VEE CLK1 nc VCC nQ1 Q1 nQ0 VCC Q0 VCC C3 .1uF |
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