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DSP56857 データシート(PDF) 189 Page - Freescale Semiconductor, Inc |
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DSP56857 データシート(HTML) 189 Page - Freescale Semiconductor, Inc |
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189 / 662 page  Register Descriptions (ITCN_BASE = $1FFF20) Overview, Rev. 4 Freescale Semiconductor 8-11 8.7.3.4 Reserved—Bits 9–8 These bits are reserved, or are not implemented. They are read as 0, but they cannot be modified by writing. 8.7.3.5 PLL Loss of Lock Interrupt Priority Level (LOCK IPL)—Bits 7–6 This bit field is used to set the interrupt priority levels for certain EOnCE IRQs. These IRQs are limited to priorities one through three and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.3.6 Reserved—Bits 5–4 These bits are reserved, or are not implemented. They are read as 0, but cannot be modified by writing. 8.7.3.7 External IRQ B Interrupt Priority Level (IRQB IPL)—Bits 3–2 This bit field is used to set the interrupt priority levels for certain EOnCE IRQs. These IRQs are limited to priorities one through three and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.3.8 External IRQ A Interrupt Priority Level (IRQA IPL)—Bits 1–0 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 |
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