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DSP56857 データシート(PDF) 192 Page - Freescale Semiconductor, Inc |
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DSP56857 データシート(HTML) 192 Page - Freescale Semiconductor, Inc |
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192 / 662 page  Register Descriptions (ITCN_BASE = $1FFF20) 5685X Digital Signal Controller User Manual, Rev. 4 8-14 Freescale Semiconductor • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.4.8 DMA 3 Done Interrupt Priority Level (DMA3 IPL)—Bits 1–0 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.5 Interrupt Priority Register 4 (IPR4) Figure 8-7. Interrupt Priority Register 4 (IPR4) See Programmer’s Sheet on Appendix page B - 27 8.7.5.1 SPI Receiver Full Interrupt Priority Level (SPI_RCV IPL)—Bits 15–14 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 8.7.5.2 ESSI1 Transmit Last Slot Interrupt Priority Level (ESSI1_TLS IPL)—Bits 13–12 This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs are limited to priorities zero through two and are disabled by default. • 00 = IRQ disabled (default) • 01 = IRQ is priority level 0 • 10 = IRQ is priority level 1 • 11 = IRQ is priority level 2 Base + $4 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Read SPI_RCV IPL ESSI1_TLS IPL ESSI1_TD IPL ESSI1_TDES IPL ESSI1_RLS IPL ESSI1_RD IPL ESSI1_RDES IPL ESSI0_TLS IPL Write Reset 00000 000000 00000 |
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