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Z86C34 データシート(PDF) 46 Page - Zilog, Inc. |
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Z86C34 データシート(HTML) 46 Page - Zilog, Inc. |
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46 / 70 page ![]() Z86C34/C35/C36/C44/C45/C46 CMOS Z8® MCUs with ASCI UART ZiLOG 46 P R E L I M I N A R Y DS007601-Z8X0499 INTERRUPTS The ASCI channel generates one interrupt (IRQ3) from two sources of interrupts: a receiver and a transmitter. In addi- tion, there are several conditions that may cause these in- terrupts to trigger. Figure 32 illustrates the different condi- tions for each interrupt source enabled under program control. Figure 32. ASCI Interrupt Conditions and Sources FIFO full Overrun error Framing Error Parity Error Start Bit Receiver Interrupt Sources Buffer Empty Transmitter Interrupt Sources ASCI Interrupt (IRQ3) |
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