GPR26L128A

© Generalplus Technology Inc.

Proprietary & Confidential

9

Aug. 13, 2009

Version: 1.3

SB

SB

Figure5. Read Data Bytes at Higher Speed (FAST_READ) Instruction Sequence and Data-Out Sequence

9.2. Read Data Bytes at Higher Speed (FAST_READ)

The device is first selected by driving Chip Select (SB) Low. The

instruction code for the Read Data Bytes at Higher Speed

(FAST_READ) instruction is followed by a 3-byte address (A23-A0)

and a dummy byte, each bit being latched-in during the rising

edge of Serial Clock (C). Then the memory contents, at that

address, is shifted out on Serial Data Output (Q), each bit being

shifted out, at a maximum frequency fC, during the falling edge of

Serial Clock (C).

The instruction sequence is shown in Figure 5. The first byte

addressed can be at any location. The address is automatically

incremented to the next higher address after each byte of data is

shifted out. The whole memory can, therefore, be read with a

single Read Data Bytes at Higher Speed (FAST_READ)

instruction. When the highest address is reached, the address

counter rolls over to 000000h, allowing the read sequence to be

continued indefinitely.

The Read Data Bytes at Higher Speed (FAST_READ) instruction

is terminated by driving Chip Select (SB) High. Chip Select (SB)

can be driven High at any time during data output.