データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

GD25B127DPFS データシート(PDF) 19 Page - GigaDevice Semiconductor (Beijing) Inc.

部品番号 GD25B127DPFS
部品情報  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  65 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
ホームページ  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25B127DPFS データシート(HTML) 19 Page - GigaDevice Semiconductor (Beijing) Inc.

Back Button GD25B127DPFS Datasheet HTML 15Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 16Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 17Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 18Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 19Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 20Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 21Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 22Page - GigaDevice Semiconductor (Beijing) Inc. GD25B127DPFS Datasheet HTML 23Page - GigaDevice Semiconductor (Beijing) Inc. Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 65 page
background image
3.3V Uniform Sector
Dual and Quad Serial Flash
GD25B127D
19
7.7. Read Data Bytes at Higher Speed (Fast Read) (0BH)
The Read Data Bytes at Higher Speed (Fast Read) command is for quickly reading data out. It is followed by a 3-byte
address (A23-A0) and a dummy byte, and each bit is latched-in on the rising edge of SCLK. Then the memory content, at
that address, is shifted out on SO, and each bit is shifted out, at a Max frequency fC, on the falling edge of SCLK. The first
byte addressed can be at any location. The address is automatically incremented to the next higher address after each byte
of data is shifted out.
Figure9. Read Data Bytes at Higher Speed Sequence Diagram
7.8. Dual Output Fast Read (3BH)
The Dual Output Fast Read command is followed by 3-byte address (A23-A0) and a dummy byte, and each bit is
latched in on the rising edge of SCLK, then the memory contents are shifted out 2-bit per clock cycle from SI and SO.
The command sequence is shown in followed Figure 10. The first byte addressed can be at any location. The address is
automatically incremented to the next higher address after each byte of data is shifted out.
Figure10. Dual Output Fast Read Sequence Diagram
Command
0
1
2
3
4
5
6
7
0BH
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
MSB
34 35 36 37
33
6
5
4
3
2
1
0
38 39
Data Out1
32
42 43 44 45
41
46 47
40
7
6
5
4
3
2
1
0
7
6
5
7
Data Out2
CS#
SCLK
SI
SO
MSB
Dummy Byte
Command
0
1
2
3
4
5
6
7
3BH
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31
3
2
1
0
23 22 21
24-bit address
MSB
34 35 36 37
33
5
3
1
7
5
3
1
38 39
Data Out1
32
42 43 44 45
41
46 47
40
7
Data Out2
CS#
SCLK
SI
SO
MSB
Dummy Clocks
4
2
0
6
4
2
0
6
6
7



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com