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データシートサーチシステム |
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データシートサーチシステム |
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GD25LE80CNJG データシート(PDF) 53 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LE80CNJG データシート(HTML) 53 Page - GigaDevice Semiconductor (Beijing) Inc. |
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53 / 68 page  1.8V Uniform Sector Dual and Quad Serial Flash GD25LE80C 53 (T= -40℃~125℃, VCC=1.65~2.1V, CL=30pf) Symbol Parameter Min. Typ. Max. Unit. fC Serial Clock Frequency For: 0BH, 3BH, BBH, 6BH, EBH 90 MHz fR Serial Clock Frequency For: Read (03H) 80 MHz tCLH Serial Clock High Time 4 ns tCLL Serial Clock Low Time 4 ns tCLCH Serial Clock Rise Time (Slew Rate) 0.1 V/ns tCHCL Serial Clock Fall Time (Slew Rate) 0.1 V/ns tSLCH CS# Active Setup Time 5 ns tCHSH CS# Active Hold Time 5 ns tSHCH CS# Not Active Setup Time 5 ns tCHSL CS# Not Active Hold Time 5 ns tSHSL CS# High Time (Read/Write) 20 ns tSHQZ Output Disable Time 6 ns tCLQX Output Hold Time 1.2 ns tDVCH Data In Setup Time 2 ns tCHDX Data In Hold Time 2 ns tHLCH Hold# Low Setup Time (Relative to Clock) 5 ns tHHCH HOLD# High Setup Time (Relative to Clock) 5 ns tCHHL Hold# High Hold Time (Relative to Clock) 5 ns tCHHH Hold# Low Hold Time (Relative to Clock) 5 ns tHLQZ Hold# Low To High-Z Output 6 ns tHHQX Hold# Low To Low-Z Output 6 ns tCLQV Clock Low To Output Valid (CL = 30pF) 7 ns Clock Low To Output Valid (CL = 15pF) 6 ns tWHSL Write Protect Setup Time Before CS# Low 20 ns tSHWL Write Protect Hold Time After CS# High 100 ns tDP CS# High To Deep Power-Down Mode 3 μs tRES1 CS# High To Standby Mode Without Electronic Signature Read 6 μs tRES2 CS# High To Standby Mode With Electronic Signature Read 4 μs tSUS CS# High To Next Command After Suspend 20 μs tRS Latency Between Resume And Next Suspend 100 μs tRST CS# High To Next Command After Reset (Except From Erase) 30 μs tRST_E CS# High To Next Command After Reset (From Erase) 12 ms tW Write Status Register Cycle Time 1 25 ms tBP1 Byte Program Time (First Byte) 25 80 μs tBP2 Addition Byte Program Time (After First Byte) 2.5 8 μs tPP Page Programming Time 0.7 4 ms |
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