TUSB8043AI datasheet(14/56 Pages) TI1

14 / 56 page

VBUS

Detect

SuperSpeed Hub

USB 2.0 Hub

Oscilator

Clock

and

Reset

Distribution

Control

Registers

GPIO

I2C

SMBUS

Power

Distribution

VDD33

VSS

GRSTz

SCL/SMBCLK

SDA/SMBDAT

SMBUSz/SS_SUSPEND

PWRCTL1/BATEN1

OVERCUR1z

PWRCTL2/BATEN2

OVERCUR2z

PWRCTL_POL

GANGED/SMBA2/HS_UP

FULLPWRMGMTz/SMBA1/SS_UP

VDD

TEST

OTP

ROM

PWRCTL3/BATEN3

OVERCUR3z

PWRCTL4/BATEN4

OVERCUR4z

AUTOENz/HS_SUSPEND

HID

I2C

TUSB8043A

SLLSF94 – JUNE 2019

www.ti.com

Product Folder Links: TUSB8043A

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8 Detailed Description

8.1 Overview

The TUSB8043A is a four-port USB 3.2 x1 Gen1 compliant hub. It provides simultaneous SuperSpeed USB and

high-speed/full-speed connections on the upstream port and provides SuperSpeed USB, high-speed, full-speed,

or low-speed connections on the downstream ports. When the upstream port is connected to an electrical

environment that only supports high-speed or full-speed/low-speed connections, SuperSpeed USB connectivity is

disabled on the downstream ports. When the upstream port is connected to an electrical environment that only

supports full-speed/low-speed connections, SuperSpeed USB and high-speed connectivity are disabled on the

downstream ports.

8.2 Functional Block Diagram

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