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54HC164 データシート(PDF) 4 Page - Silicon Supplies |
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54HC164 データシート(HTML) 4 Page - Silicon Supplies |
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4 / 6 page ![]() Page 4 of 6 www.siliconsupplies.com DC Electrical Characteristics (Voltages Referenced to GND) High Speed CMOS Logic – 54HC164 Rev 1.0 24/11/17 LIMITS PARAMETER SYMBOL VCC CONDITIONS 25°C 85°C FULL RANGE 4 UNITS 2.0V 1.9 1.9 1.9 4.5V 4.4 4.4 4.4 6.0V VIN = VIH or VIL │IOUT│≤ 20µA 5.9 5.9 5.9 V 3.0V VIN = VIH or VIL │IOUT│≤ 2.4mA 2.48 2.34 2.20 V 4.5V VIN = VIH or VIL │IOUT│≤ 4.0mA 3.98 3.84 3.70 Minimum High-Level Output Voltage VOH 6.0V VIN = VIH or VIL │IOUT│≤ 5.2mA 5.48 5.34 5.20 V 2.0V 0.1 0.1 0.1 4.5V 0.1 0.1 0.1 6.0V VIN = VIH or VIL │IOUT│≤ 20µA 0.1 0.1 0.1 V 3.0V VIN = VIH or VIL │IOUT│≤ 2.4mA 0.26 0.33 0.40 V 4.5V VIN = VIH or VIL │IOUT│≤ 4.0mA 0.26 0.33 0.40 V Maximum Low-Level Output Voltage VOL 6.0V VIN = VIH or VIL │IOUT│≤ 5.2mA 0.26 0.33 0.40 V Maximum Input Leakage Current IIN 6.0V VIN = VCC or GND ±0.1 ±1.0 ±1.0 µA Maximum Quiescent Supply Current ICC 6.0V VIN = VCC or GND, IOUT = 0µA 4 40 160 µA AC Electrical Characteristics5 LIMITS PARAMETER SYMBOL VCC CONDITIONS 25°C 85°C FULL RANGE 4 UNITS 2.0V 10 10 10 3.0V 20 20 20 4.5V 40 35 30 Maximum Clock Frequency, (50% duty cycle) fmax 6.0V CL = 50pF, tr = tf = 6ns 50 45 40 ns 2.0V 160 200 250 3.0V 100 150 200 4.5V 32 40 48 Maximum Propagation Delay, CLK to Q tPLH, tPHL 6.0V CL = 50pF, tr = tf = 6ns 27 34 42 ns 5. Not production tested in die form, characterized by chip design and tested in package. |
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