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74AXP2T08GF データシート(PDF) 1 Page - Nexperia B.V. All rights reserved |
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74AXP2T08GF データシート(HTML) 1 Page - Nexperia B.V. All rights reserved |
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1 / 16 page  74AXP2T08 Dual supply, dual 2-input AND gate Rev. 4 — 27 March 2019 Product data sheet 1. General description The 74AXP2T08 is a dual supply, dual 2-input AND gate. It features four inputs (nA and nB), two outputs (nY) and dual supply pins (VCCI and VCCO). The inputs are referenced to VCCI and the outputs are referenced to VCCO. All inputs can be connected directly to VCCI or GND. VCCI can be supplied at any voltage between 0.7 V and 2.75 V and VCCO can be supplied at any voltage between 1.2 V and 5.5 V. This feature allows voltage level translation. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire supply range and is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range: • VCCI: 0.7 V to 2.75 V • VCCO: 1.2 V to 5.5 V • Low input capacitance; CI = 0.6 pF (typical) • Low output capacitance; CO = 1.8 pF (typical) • Low dynamic power consumption; CPD = 0.5 pF at VCCI = 1.2 V (typical) • Low dynamic power consumption; CPD = 7.1 pF at VCCO = 3.3 V (typical) • Low static power consumption; ICCI = 0.5 μA (85 °C maximum) • Low static power consumption; ICCO = 1.8 μA (85 °C maximum) • High noise immunity • Complies with JEDEC standard: • JESD8-12A.01 (1.1 V to 1.3 V; nA, nB inputs) • JESD8-11A.01 (1.4 V to 1.6 V) • JESD8-7A (1.65 V to 1.95 V) • JESD8-5A.01 (2.3 V to 2.7 V) • JESD8-C (2.7 V to 3.6 V; nY outputs) • JESD12-6 (4.5 V to 5.5 V; nY outputs) • ESD protection: • HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV • CDM JESD22-C101E exceeds 1000 V • Latch-up performance exceeds 100 mA per JESD78D Class II • Inputs accept voltages up to 2.75 V • Low noise overshoot and undershoot < 10% of VCCO • IOFF circuitry provides partial power-down mode operation • Specified from -40 °C to +85 °C |
同様の部品番号 - 74AXP2T08GF |
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同様の説明 - 74AXP2T08GF |
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