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ST7SB20J/US データシート(PDF) 57 Page - STMicroelectronics |
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ST7SB20J/US データシート(HTML) 57 Page - STMicroelectronics |
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57 / 154 page ![]() ST7232A 57/154 16-BIT TIMER (Cont’d) Figure 33. Counter Timing Diagram, internal clock divided by 2 Figure 34. Counter Timing Diagram, internal clock divided by 4 Figure 35. Counter Timing Diagram, internal clock divided by 8 Note: The MCU is in reset state when the internal reset signal is high, when it is low the MCU is running. CPU CLOCK FFFD FFFE FFFF 0000 0001 0002 0003 INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) FFFC FFFD 0000 0001 CPU CLOCK INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) CPU CLOCK INTERNAL RESET TIMER CLOCK COUNTER REGISTER TIMER OVERFLOW FLAG (TOF) FFFC FFFD 0000 1 |
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