CS4922 datasheet(21/34 Pages) CIRRUS

21 / 34 page

CS4922

For normal SPI operation SCL/SCK, CS, CDIN,

CDOUT and REQ are used. SCL/SCK is the serial

clock input which is always driven by an external

device. CS is the active low enable signal. CDIN is

the control data input. CDOUT is the control data

output. REQ is the active low request signal, which

is driven low when there is valid data in the serial

control port output SCPOUT register.

As an SPI compatible port, data is communicated

on the CDIN and CDOUT pins and is clocked by

the rising edge of SCL/SCK. CS is used to select

the device on which the CDIN and CDOUT sig-

nals will be valid.

Figure 16 shows the relative timing necessary for

an SPI write operation of a single byte. A ‘write’ is

defined as the transfer of data from an SPI bus mas-

ter to the CS4922 serial control port via CDIN. A

transfer is initiated with CS being driven active

low. This is followed by a 7 bit address and a

read/write bit (set low for a write). For SPI mode,

this address is typically not used, however it is still

necessary to clock an address across the bus fol-

lowed by the read/write bit.

If a write to the CS4922 is specified, 8 bits of data

on CDIN will be shifted into the input shift register

as shown in Figure 13. When the shift register is

full, the 8 bit data is transferred to the Serial Con-

trol Port Input (SCPIN) register on the falling edge

of the 8th data bit.

If the DSP core of the CS4922 wants to send a byte

to the master, it first writes the byte to the Serial

Control Port Output (SCPOUT) register. A write

to the SCPOUT sets the request pin (REQ) active

low. The master must recognize the request and is-

sue a read operation to the DSP. Figure 17 shows

the relative timing of a single byte read. The master

must send the 7 bit address (if address checking is

enabled it must match the address in the SCPCN

SCL/SCK for the read/write bit, the serial shift reg-

ister is loaded with the byte to be sent and the most

significant bit is placed on the CDOUT line.

I C

Controller

SCL

SDA

Vcc

Ω

Vcc

CS4922

SCL/SCK

SDA

to other

I C

devices

Figure 15. I2C® Connection Diagram

SCL/SCK

CDIN

AD6

AD5

AD4

AD3

AD2

AD1

AD0

R/W

Figure 16. Control Port Timing, SPI Write

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