AM652X datasheet(211/277 Pages) TI1

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211

AM6548, AM6528, AM6546

AM6526, AM6527

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SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019

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Specifications

(1) j in [j:0] is equal to 7 (for MMC0), or 3 (for MMC1).

Figure 5-76. eMMC/SD/SDIO in - High Speed SDR25 - Receiver Mode

Figure 5-77. eMMC/SD/SDIO in - High Speed SDR25 - Transmitter Mode

5.9.5.16.1.5 UHS-I SDR50 Mode

and Table 5-76 present Timing requirements and Switching characteristics for MMCi - SDR50 in receiver

and transmitter mode (see and Figure 5-78).

Table 5-76. Switching Characteristics for MMCi - SDR50 Mode

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

SDR501

fop(clk)

Operating frequency, MMCi_CLK

100

MHz

SDR502H

tw(clkH)

Pulse duration, MMCi_CLK high

4.45

SDR502L

tw(clkL)

Pulse duration, MMCi_CLK low

4.45

SDR505

td(clkH-cmdV)

Delay time, MMCi_CLK rising clock edge to MMCi_CMD transition

1.2

6.35

SDR506

td(clkH-dV)

Delay time, MMCi_CLK rising clock edge to MMCi_DAT[j:0]

transition

1.2

6.35

(1) j in [j:0] is equal to 7 (for MMC0), or 3 (for MMC1).

Figure 5-78. eMMC/SD/SDIO in - High Speed SDR50 - Transmitter Mode

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