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AM652X データシート(PDF) 230 Page - Texas Instruments |
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AM652X データシート(HTML) 230 Page - Texas Instruments |
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230 / 277 page  CAP PREP1 SPRSP08_TIMING_ECAP_01 SYNCI PREP2 PRUR3L Start Bit Data Bits PRG _UART0_TXD i SPRS91x_TIMING_PRU_UART_01 PRUR3H PRUR1L Data Bits Bit Start PRG _UART0_RXD i PRUR1H (1) (1) (1) i in PRG _UART0_RXD and PRG _UART0_TXD = 0, 1 or 2 i i 230 AM6548, AM6528, AM6546 AM6526, AM6527 SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527 Specifications Copyright © 2017–2019, Texas Instruments Incorporated Table 5-101. PRU_ICSSG UART Timing Requirements NO. PARAMETER DESCRIPTION MIN MAX UNIT PRUR1H tw(RXH) Pulse Duration, Receive start, stop, data bit High 0+U (1) ns PRUR1L tw(RXL) Pulse Duration, Receive start, stop, data bit Low -2+U (1) ns (1) U = UART baud time = 1/programmed baud rate. Table 5-102. PRU_ICSSG UART Switching Characteristics NO. PARAMETER DESCRIPTION MIN MAX UNIT PRUR2 f(baud) Maximum programmable baud rate 12 MHz PRUR3L tw(TXH) Pulse Duration, Transmit start, stop, data bit High 0+U(1) ns PRUR3H tw(TXL) Pulse Duration, Transmit start, stop, data bit Low -2+U(1) ns (1) U = UART baud time = 1/programmed baud rate. Figure 5-107. PRU_ICSSG UART Timing 5.9.5.21.5 PRU_ICSSG Enhanced Capture Peripheral (PRU-ICSS ECAP) 5.9.5.21.5.1 PRU_ICSSG ECAP Electrical Data and Timing Table 5-103. PRU_ICSSG ECAP Timing Requirements NO. PARAMETER DESCRIPTION MIN MAX UNIT PREP1 tw(CAP) Pulse Duration, Capture input (asynchronous) 2+2×P (1) ns PREP2 tw(SYNCI) Pulse Duration, Sync input (asynchronous) 2+2×P (1) ns (1) P = core_clk period Figure 5-108. PRU_ICSSG ECAP Timing |
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