Clock Timing Chart 2 (Using only Main Line)

5

0

φRS

5

0

φROG

5

0

φ2, φ4, φ2L

5

0

φ1, φ3

0V

φ1L'

Optical black

(16 pixels)

Dummy signal

(93 pixels)

Effective pixel signal

(10700 pixels)

Dummy signal

(22 pixels)

1-line output period

Note) The transfer pulse

φ1, φ2, φ1L', φ2L, φ3 and φ4 have must more than 10816 cycles.