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PWD13F60 データシート(PDF) 6 Page - STMicroelectronics

部品番号 PWD13F60
部品情報  High-density power driver -high voltage full bridge with integrated gate driver
PDF  26 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PWD13F60 データシート(HTML) 6 Page - STMicroelectronics

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Electrical data
PWD13F60
6/26
DocID030865 Rev 2
3
Electrical data
3.1
Absolute maximum ratings
Table 2. Absolute maximum ratings
Symbol
Parameter
Test condition
Value
Unit
VDS
MOSFET drain-to-
source voltage
TJ = 25 °C
600
V
VCC1, VCC2 Drivers supply voltage
-
-0.3 to 19
V
VCCx-SENSEx
VCC to SENSE pin
voltage
-
-0.3 to 19
V
VBOOTx
Bootstrap voltage
-
GNDx -0.3 to 600
V
VBO1, VBO2
BOOTx to OUTx pin
voltage
-
-0.3 to 19
V
ID
Drain current (per
MOSFET)
DC at TCB = 25 °C(1)
1. TCB is temperature of case bottom pad.
8A
DC at TCB = 100 °C(1), (2)
2. Characterized, not tested in production.
6.9
A
Peak at TCB = 25 °C(1), (2), (3)
3. The value specified by the design factor, pulse duration limited by max. junction temperature and SOA.
32
A
ISD
Source-drain diode
current (per diode)
DC at TCB = 25 °C(1)
8A
Peak at TCB = 25 °C(1), (2), (3)
32
A
SRout
Full bridge outputs slew
rate (10% - 90%)
(2)
40
V/ns
Vi
Logic inputs voltage
range
-
-0.3 to 15
V
TJ
Junction temperature
-
-40 to 150
°C
Ts
Storage temperature
-
-40 to 150
°C
Ptot
Total power
dissipation(4)
4. Value calculated basing on thermal resistance, power uniformly distributed over the four power MOSFETs,
still air.
TCB = 25 °C for each MOSFET
450
W
Tamb = 25 °C, JEDEC board(5), (6)
5. The device mounted on a FR4 2s2p board as JESD51-5/7.
6. Actual applicative board max. dissipation could be higher or lower depending on the layout and cooling
techniques.
6.9
W



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