データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

AS7C251MPFS18A データシート(PDF) 6 Page - Alliance Semiconductor Corporation

部品番号 AS7C251MPFS18A
部品情報  2.5V 1M x 18 pipelined burst synchronous SRAM
PDF  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  ALSC [Alliance Semiconductor Corporation]
ホームページ  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS7C251MPFS18A データシート(HTML) 6 Page - Alliance Semiconductor Corporation

Back Button AS7C251MPFS18A Datasheet HTML 2Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 3Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 4Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 5Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 6Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 7Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 8Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 9Page - Alliance Semiconductor Corporation AS7C251MPFS18A Datasheet HTML 10Page - Alliance Semiconductor Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 19 page
background image
®
AS7C251MPFS18A
12/23/04, v. 2.2
Alliance Semiconductor
6 of 19
Write enable truth table (per byte)
Key: X = don’t care; L = low; H = high; BWE, BWn = internal write signal
Asynchronous Truth Table
Notes:
1. X means “Don’t Care”
2. ZZ pin is pulled down internally
3. For write cycles that follows read cycles, the output buffers must be disabled with OE, otherwise data bus contention will occur.
4. Snooze mode means power down state of which stand-by current does not depend on cycle times
5. Deselected means power down state of which stand-by current depends on cycle times
Burst sequence table
Function
GWE
BWE
BWa
BWb
Write all bytes (a, b)
LX
X
X
H
LLL
Write byte a
H
L
L
H
Write byte b
H
L
H
L
Read
HHX
X
HL
H
H
Operation
ZZ
OE
I/O Status
Snooze mode
H
X
High-Z
Read
LL
Dout
LH
High-Z
Write
L
X
Din, High-Z
Deselected
L
X
High-Z
Interleaved burst address (LBO = 1)
Linear burst address (LBO = 0)
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
A1 A0
Starting Address
0 0
0 1
1 0
1 1
Starting Address
0 0
0 1
1 0
1 1
First Increment
0 1
0 0
1 1
1 0
First Increment
0 1
1 0
1 1
0 0
Second Increment
1 0
1 1
0 0
0 1
Second Increment
1 0
1 1
0 0
0 1
Third Increment
1 1
1 0
0 1
0 0
Third Increment
1 1
1 0
0 1
1 0



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com