 2014 Microchip Technology Inc.

DS20005284A-page 1

MCP2561/2FD

Features:

• Optimized for CAN FD (Flexible Data rate) at 2, 5

and 8 Mbps Operation

- Maximum Propagation Delay: 120 ns

- Loop Delay Symmetry: -10%/+10% (2 Mbps)

• Implements ISO-11898-2 and ISO-11898-5

Standard Physical Layer Requirements

• Very Low Standby Current (5 µA, typical)



CAN Controllers and Microcontrollers with



1.8V to 5.5V I/O

• SPLIT Output Pin to Stabilize Common Mode in

Biased Split Termination Schemes

• CAN Bus Pins are Disconnected when Device is

Unpowered

- An Unpowered Node or Brown-Out Event will

Not Load the CAN Bus

• Detection of Ground Fault:

- Permanent Dominant Detection on Bus

• Power-on Reset and Voltage Brown-Out

• Protection Against Damage Due to Short-Circuit

Conditions (Positive or Negative Battery Voltage)

• Protection Against High-Voltage Transients in

Automotive Environments

• Automatic Thermal Shutdown Protection

• Suitable for 12V and 24V Systems

• Meets or exceeds stringent automotive design

requirements including “Hardware Requirements

for LIN, CAN and FlexRay Interfaces in

Automotive Applications”, Version 1.3, May 2012

- Radiated emissions @ 2 Mbps with Common

Mode Choke (CMC)

-DPI @ 2 Mbps with CMC

• High ESD Protection on CANH and CANL,

meeting IEC61000-4-2 up to ±14 kV

• Available in PDIP-8L, SOIC-8L and 3x3 DFN-8L

• Temperature ranges:

- Extended (E): -40°C to +125°C

- High (H): -40°C to +150°C

Description:

The MCP2561/2FD is a second generation high-speed

CAN transceiver from Microchip Technology Inc. It

offers the same features as the MCP2561/2.

Additionally, it guarantees Loop Delay Symmetry in

order to support the higher data rates required for CAN

FD. The maximum propagation delay was improved to

support longer bus length.

The device meets the automotive requirements for

CAN FD bit rates exceeding 2 Mbps, low quiescent

current, electromagnetic compatibility (EMC) and

electrostatic discharge (ESD).

Package Types

MCP2561/2FD Family Members

MCP2562FD

PDIP, SOIC

CANH

CANL

1

2

3

4

8

7

6

STBY

MCP2561FD

PDIP, SOIC

CANH

CANL

1

2

3

4

8

7

6

5 SPLIT

STBY

MCP2561FD

3x3 DFN*

CANH

CANL

1

2

3

4

8

7

6

5 SPLIT

STBY

EP

9

MCP2562FD

3x3 DFN*

CANH

CANL

1

2

3

4

8

7

6

STBY

EP

9

* Includes Exposed Thermal Pad (EP); see Table 1-2

Device

Feature

Description

MCP2561FD

SPLIT pin

Common mode stabilization

MCP2562FD

Internal level shifter on digital I/O pins

Note: For ordering information, see the “Product Identification System” section on page 29.

High-Speed CAN Flexible Data Rate Transceiver