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ASM2I2313ANZ データシート(PDF) 9 Page - Alliance Semiconductor Corporation

部品番号 ASM2I2313ANZ
部品情報  13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs
PDF  13 Pages
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メーカー  ALSC [Alliance Semiconductor Corporation]
ホームページ  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

ASM2I2313ANZ データシート(HTML) 9 Page - Alliance Semiconductor Corporation

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June 2005
ASM2I2313ANZ
rev 0.4
13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs
9 of 13
Notice: The information in this document is subject to change without notice.
Cd = 0.1 µ F
Application Information
Clock traces must be terminated with either series or parallel termination, as is normally done.
Application Circuit
Cd = DECOUPLING CAPACITORS
Ct = OPTIONAL EMI-REDUCING CAPACITORS
Rs = SERIES TERMINATING RESISTORS
Summary
Surface mount, low-ESR, ceramic capacitors should be used for filtering. Typically, these capacitors have a value
of 0.1 µF. In some cases, smaller value capacitors may be required.
The value of the series terminating resistor satisfies the following equation, where Rtrace is the loaded characteristic
impedance of the trace, Rout is the output impedance of the buffer (typically 25Ω), and Rseries is the series terminating
resistor.
Rseries > Rtrace – Rout
Footprints must be laid out for optional EMI-reducing capacitors, which should be placed as close to the terminating
resistor as is physically possible. Typical values of these capacitors range from 4.7pF to 22pF.
A Ferrite Bead may be used to isolate the Board VDD from the clock generator VDD island. Ensure that the Ferrite Bead
offers greater than 50Ω impedance at the clock frequency, under loaded DC conditions.
If a Ferrite Bead is used, a 10µF–22µF tantalum bypass capacitor should be placed close to the Ferrite Bead. This
capacitor prevents power supply droop during current surges.
Rs
BUF_IN
SDATA
SCLK
VDD
VSS
Rs
SDRAM (0.12)
Ct
3.3V
ASM2I2313ANZ
28-Pin SOIC
CPUCLK
SDATA
SCLK
SDRAM(0.12)



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