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74LS221N データシート(PDF) 5 Page - ON Semiconductor

部品番号 74LS221N
部品情報  LOW POWER SCHOTTKY
PDF  8 Pages
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

74LS221N データシート(HTML) 5 Page - ON Semiconductor

  74LS221N Datasheet HTML 1Page - ON Semiconductor 74LS221N Datasheet HTML 2Page - ON Semiconductor 74LS221N Datasheet HTML 3Page - ON Semiconductor 74LS221N Datasheet HTML 4Page - ON Semiconductor 74LS221N Datasheet HTML 5Page - ON Semiconductor 74LS221N Datasheet HTML 6Page - ON Semiconductor 74LS221N Datasheet HTML 7Page - ON Semiconductor 74LS221N Datasheet HTML 8Page - ON Semiconductor  
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5
AC CHARACTERISTICS (VCC = 5.0 V, TA = 25°C)
From
To
Limits
Symbol
From
(Input)
To
(Output)
Min
Typ
Max
Unit
Test Conditions
t
A
Q
45
70
ns
tPLH
B
Q
35
55
ns
t
A
Q
50
80
ns
C
=80 pFR
=20
Ω
tPHL
B
Q
40
65
ns
Cext = 80 pF, Rext = 2.0 Ω
tPHL
Clear
Q
35
55
ns
CL = 15 pF,
tPLH
Clear
Q
44
65
ns
L
See Figure 1
70
120
150
Cext = 80 pF, Rext = 2.0 Ω
t ()
AorB
QorQ
20
47
70
ns
Cext = 0, Rext = 2.0 kΩ
tW(out)
A or B
Q or Q
600
670
750
Cext = 100 pF, Rext = 10 kΩ
6.0
6.9
7.5
ms
Cext = 1.0 µF, Rext = 10 kΩ
AC SETUP REQUIREMENTS (VCC = 5.0 V, TA = 25°C)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Rate of Rise or Fall of Input Pulse
dv/dt
Schmitt, B
1.0
V/s
Logic Input, A
1.0
V/
µs
Input Pulse Width
tW
A or B, tW(in)
40
ns
W
Clear, tW (clear)
40
ts
Clear-Inactive-State Setup Time
15
ns
Rext
External Timing Resistance
1.4
100
k
Ω
Cext
External Timing Capacitance
0
1000
µF
Output Duty Cycle
RT = 2.0 k
Ω
50
%
RT = MAX Rext
90



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