74V2G126STR datasheet(1/11 Pages) STMICROELECTRONICS

部品番号	74V2G126STR

部品情報	DUAL BUS BUFFER (3-STATE)

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メーカー	STMICROELECTRONICS [STMicroelectronics]

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1/11

November 2001

s

HIGH SPEED: tPD = 3.8ns (TYP.) at VCC =5V

s

LOW POWER DISSIPATION:

ICC =1µA(MAX.) at TA=25°C

s

HIGH NOISE IMMUNITY:

VNIH =VNIL = 28% VCC (MIN.)

s

POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

s

SYMMETRICAL OUTPUT IMPEDANCE:

|IOH|=IOL = 8mA (MIN) at VCC = 4.5V

s

BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s

OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 5.5V

s

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74V2G126 is an advanced high-speed CMOS

DUAL BUS BUFFER fabricated with sub-micron

silicon gate and double-layer metal wiring C2MOS

tecnology.

3-STATE control input nG has to be set LOW to

place the output into the high impedance state.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V systems

and it is ideal for portable applications like

personal digital assistant, camcorder and all

battery-powered equipment.

All

inputs

and

outputs

are

equipped

with

protection circuits against static discharge, giving

them ESD immunity and transient excess voltage.

74V2G126

DUAL BUS BUFFER (3-STATE)

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE

T & R

SOT23-8L

74V2G126STR

SOT323-8L

74V2G126CTR

SOT23-8L

SOT323-8L

同様の部品番号 - 74V2G126STR

メーカー	部品番号	データシート	部品情報
STMicroelectronics	74V2G126STR	160Kb / 9P	DUAL BUS BUFFER (3-STATE) Jun-2003

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同様の説明 - 74V2G126STR

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Renesas Technology Corp	HD74ALVC2G125	130Kb / 15P	Dual Bus Buffer with 3-state Output