| データシートサーチシステム |
|
L6986H データシート(PDF) 37 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L6986H データシート(HTML) 37 Page - STMicroelectronics |
|
37 / 68 page ![]() whereas the zero is defined as: fZ= 1 2⋅π⋅Rc⋅Cc (27) 5.3 Voltage divider The contribution of the internal voltage divider for fixed output voltage devices is: GDIV(s)= R2R1+R2= VFBVOUT=0.853.3=0.2575 L6986H3V GDIV(s)= R2R1+R2= VFBVOUT=0.855=0.17 L698H5V (28) while for the adjustable output part number L6986H is: GDIV(s)= R2R1+R2 L6986H (29) A small signal capacitor in parallel to the upper resistor (see Figure 37. Leading network example) of the voltage divider implements a leading network (fzero < fpole), sometimes necessary to improve the system phase margin: Figure 37. Leading network example L6986H Rc Power GND Cc signal GND Cp Cr1 R1 R2 uC RST RST 1 VCC 2 SS/INH 3 SYNCH 4 FSW 5 MLF 6 COMP 7 DELAY 8 FB 9 SGND 10 11 PGND PGND 12 LX 13 LX 14 VIN 15 VBIAS 16 EP 17 GND VIN VOUT The Laplace transformer of the leading network is: GDIV(s)= R2R1+R2⋅ (1+s+R1⋅CR1) (1+s⋅ R1⋅R2 R1+R2⋅CR1) (30) where fZ= 1 2⋅π⋅R1⋅CR1 fp= 1 2⋅π⋅ R1⋅R2 R1+R2⋅CR1 fZ<fp (31) L6986H Voltage divider DS12905 - Rev 2 page 37/68 |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |