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STM32H747AI データシート(PDF) 187 Page - STMicroelectronics

部品番号 STM32H747AI
部品情報  Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, up to 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI
PDF  252 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H747AI データシート(HTML) 187 Page - STMicroelectronics

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DS12930 Rev 1
177/242
STM32H747xI/G
Electrical characteristics
221
Figure 42. Quad-SPI timing diagram - SDR mode
Figure 43. Quad-SPI timing diagram - DDR mode
6.3.22
Delay block (DLYB) characteristics
Unless otherwise specified, the parameters given in Table 97 for Delay Block are derived
from tests performed under the ambient temperature, frcc_c_ck frequency and VDD supply
voltage summarized in Table 22: General operating conditions, with the following
configuration:
MSv36878V1
Data output
D0
D1
D2
Clock
Data input
D0
D1
D2
t(CK)
tw(CKH)
tw(CKL)
tr(CK)
tf(CK)
ts(IN)
th(IN)
tv(OUT)
th(OUT)
MSv36879V1
Data output
D0
D2
D4
Clock
Data input
D0
D2
D4
t(CK)
tw(CKH)
tw(CKL)
tr(CK)
tf(CK)
tsf(IN) thf(IN)
tvf(OUT)
thr(OUT)
D1
D3
D5
D1
D3
D5
tvr(OUT)
thf(OUT)
tsr(IN) thr(IN)
Table 97. Delay Block characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tinit
Initial delay
-
1400
2200
2400
ps
t∆
Unit Delay
-
35
40
45
-



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