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TLE8457CSJ データシート(PDF) 5 Page - Infineon Technologies AG |
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TLE8457CSJ データシート(HTML) 5 Page - Infineon Technologies AG |
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5 / 31 page ![]() Data Sheet 5 Rev. 1.1 2018-10-15 TLE8457C / TLE8457D LIN Transceiver with integrated voltage regulator Pin configuration 3 Pin configuration 3.1 Pin assignment Figure 2 Pin configuration 3.2 Pin definitions and functions Pin Symbol Function 1VS Battery supply voltage; Decoupling capacitor required 2EN Enable input; Integrated pull-down resistor Logic “high” to select normal operation mode 3GND Ground 4BUS BUS input/output; Integrated LIN slave termination 5RxD Receive data output; Monitors the LIN bus signal in normal operation mode Indicates a wake-up event in standby mode 6TxD Transmit data input; Integrated pull-up resistor Logic “low” to drive a dominant signal on the LIN bus 7NRST Undervoltage reset output; Integrated pull-up resistor Logical “low” during reset 8VCC Voltage regulator output; Output capacitor requirements specified in functional device characteristics PAD1) 1) Only available with PG-TSON8 package. – Connect to PCB heat sink area. Do not connect to other potential than GND 1 2 3 45 6 7 8 VS 1 2 3 45 6 7 8 EN GND BUS VCC NRST TxD RxD VS EN GND BUS VCC NRST TxD RxD PG-DSO-8 PG-TSON-8 (Top side X-Ray view) (PAD) |
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