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STM32G474PBY3XXX データシート(PDF) 151 Page - STMicroelectronics |
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STM32G474PBY3XXX データシート(HTML) 151 Page - STMicroelectronics |
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151 / 236 page  DS12288 Rev 5 151/236 STM32G474xB STM32G474xC STM32G474xE Electrical characteristics 200 Table 72. ADC accuracy (Multiple ADCs operation) - limited test conditions 2(1)(2)(3) Symbol Parameter Conditions(4) Min Typ Max Unit ET Total unadjusted error Multiple ADC operation ADC clock frequency: single ended ≤ 52 MHz, differential ≤ 56 MHz, VDDA ≥ 2.7 V, VREF≥ 1.62 V, -40 to 125°C, Continuous mode, sampling time: Fast channels: 2.5 cycles Slow channels: 6.5 cycles LQFP100 package Single ended - 7.1 - LSB Differential - 4.6 - EO Offset error Single ended - 4.2 - Differential - 2.8 - EG Gain error Single ended - 6.8 - Differential - 4.3 - ED Differential linearity error Single ended - 1.5 - Differential - 1.7 - EL Integral linearity error Single ended - 3.1 - Differential - 2.4 - ENOB Effective number of bits Single ended - 10.2 - bits Differential - 10.6 - SINAD Signal-to-noise and distortion ratio Single ended - 62.9 - dB Differential - 65.3 - SNR Signal-to-noise ratio Single ended - 63.6 - Differential - 66.3 - THD Total harmonic distortion Single ended - -70.9 - dB Differential - -71.8 - 1. Data based on characterization result, not tested in production. 2. ADC DC accuracy values are measured after internal calibration. 3. ADC accuracy vs. negative Injection Current: Injecting negative current on any analog input pins should be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative current. 4. The I/O analog switch voltage booster is enabled when VDDA < 2.4 V (BOOSTEN = 1 in the SYSCFG_CFGR1 when VDDA < 2.4 V). It is disabled when VDDA ≥ 2.4 V. No oversampling. |
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