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STM32G47PBY3TR データシート(PDF) 195 Page - STMicroelectronics |
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STM32G47PBY3TR データシート(HTML) 195 Page - STMicroelectronics |
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195 / 229 page  DS12712 Rev 3 195/229 STM32G473xB STM32G473xC STM32G473xE Package information 225 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 6.1 WLCSP81 package information WLCSP81 is a 81-ball, 4.02x4.27 mm, 0.4 mm pitch wafer level chip scale package. Figure 54. WLCSP81 - outline 1. Drawing is not to scale. 2. Dimension is measured at the maximum bump diameter parallel to primary datum Z. 3. Primary datum Z and seating plane are defined by the spherical crowns of the bump. 4. Bump position designation per JESD 95-1, SPP-010. B068_WLCSP81_DIE469_ME_V1 1 9 e1 e2 e J A F G D E A A2 A1 bbb Z A3 A2 A1 BALL LOCATION DETAIL A b ccc ddd M Z Z X Y M b(81x) SEATING PLANE z BUMP DETAIL A ROTATED 90 eee Z TOP VIEW BOTTOM VIEW FRONT VIEW SIDE VIEW A1 eee (4X) |
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