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STM32G474PBY3TR データシート(PDF) 56 Page - STMicroelectronics

部品番号 STM32G474PBY3TR
部品情報  Arm® Cortex®-M4 32-bit MCUFPU, 170 MHz / 213 DMIPS, 128 KB SRAM, rich analog, math acc, 184 ps 12 chan Hi-res timer
PDF  236 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G474PBY3TR データシート(HTML) 56 Page - STMicroelectronics

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Pinouts and pin description
STM32G474xB STM32G474xC STM32G474xE
56/236
DS12288 Rev 5
4.10
Pin definition
Table 11. Legend/abbreviations used in the pinout table
Name
Abbreviation
Definition
Pin name
Unless otherwise specified in brackets below the pin name, the pin function during and after
reset is the same as the actual pin name
Pin type
S
Supply pin
I
Input only pin
I/O
Input / output pin
I/O structure
FT
5 V tolerant I/O
TT
3.6 V tolerant I/O
B
Dedicated BOOT0 pin
NRST
Bidirectional reset pin with embedded weak pull-up resistor
Option for TT or FT I/Os
_a(1)
I/O, with Analog switch function supplied by VDDA
_c
I/O, USB Type-C PD capable
_d
I/O, USB Type-C PD Dead Battery function
_f(2)
I/O, Fm+ capable
_u(3)
I/O, with USB function
Notes
Unless otherwise specified by a note, all I/Os are set as floating inputs during and after reset
Pin functions
Alternate
functions
Functions selected through GPIOx_AFR registers
Additional
functions
Functions directly selected/enabled through peripheral registers
1. The related I/O structures in Table 12 are: FT_a, FT_fa, TT_a.
2. The related I/O structures in Table 12 are: FT_f, FT_fa.
3. The related I/O structures in Table 12 are FT_u.



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