データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

FXLS8964AF データシート(PDF) 83 Page - NXP Semiconductors

部品番号 FXLS8964AF
部品情報  3-Axis Low-g Accelerometer
PDF  98 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXLS8964AF データシート(HTML) 83 Page - NXP Semiconductors

Back Button FXLS8964AF Datasheet HTML 79Page - NXP Semiconductors FXLS8964AF Datasheet HTML 80Page - NXP Semiconductors FXLS8964AF Datasheet HTML 81Page - NXP Semiconductors FXLS8964AF Datasheet HTML 82Page - NXP Semiconductors FXLS8964AF Datasheet HTML 83Page - NXP Semiconductors FXLS8964AF Datasheet HTML 84Page - NXP Semiconductors FXLS8964AF Datasheet HTML 85Page - NXP Semiconductors FXLS8964AF Datasheet HTML 86Page - NXP Semiconductors FXLS8964AF Datasheet HTML 87Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 83 / 98 page
background image
NXP Semiconductors
FXLS8964AF
3-Axis Low-g Accelerometer
FXLS8964AF
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Objective data sheet
Rev. 2 — 30 October 2020
83 / 98
The scaling for this register is always the same as the selected FSR's sensitivity. See
Section 9.4 for the sensitivity values corresponding to each of the selectable FSRs.
Table 113. SDCD_UTHS_MSB register (address 36h) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
—
—
—
—
SDCD_UTHS[11:8]
Reset (BT_MODE = GND)
0
0
0
0
0
0
0
0
Reset (BT_MODE = VDD)
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 114. SDCD_UTHS_MSB register (address 36h) bit description
Field
Description
3:0
SDCD_UTHS[11:8]
MSB (nibble) of the signed 12-bit 2's complement upper-threshold value
13.32 SELF_TEST_CONFIG1 register (address 37h)
Table 115. SELF_TEST_CONFIG1 register (address 37h) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
—
—
—
ST_IDLE[4:0]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 116. SELF_TEST_CONFIG1 register (address 37h) bit description
Field
Description
4:0
ST_IDLE
Self-Test Idle phase duration:
The value contained in ST_IDLE determines the Self-Test Idle phase duration per the following
equation:
STIDLE = 312.5 µs + (ST_IDLE * 31.25) µs
13.33 SELF_TEST_CONFIG2 register (address 38h)
Table 117. SELF_TEST_CONFIG2 register (address 38h) bit allocation
Bit
7
6
5
4
3
2
1
0
Name
—
—
—
—
ST_DEC[3:0]
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com