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WM8569 データシート(PDF) 8 Page - Wolfson Microelectronics plc

部品番号 WM8569
部品情報  24-bit, 192kHz Stereo CODEC with Volume Control
PDF  36 Pages
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メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8569 データシート(HTML) 8 Page - Wolfson Microelectronics plc

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PP Rev 1.1 December 2005
8
MASTER CLOCK TIMING
MCLK
t
MCLKL
t
MCLKH
t
MCLKY
Figure 1 ADC and DAC Master Clock Timing Requirements
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, AGND, DGND = 0V, TA = +25
oC, fs = 48kHz, DACMCLK and
ADCMCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
MCLK System clock pulse width
high
tMCLKH
11
ns
MCLK System clock pulse width
low
tMCLKL
11
ns
MCLK System clock cycle time
tMCLKY
28
ns
MCLK Duty cycle
40:60
60:40
Table 1 Master Clock Timing Requirements
DIGITAL AUDIO INTERFACE – MASTER MODE
Figure 2 Audio Interface – Master Mode



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