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PSD813F1AV-12MIT データシート(PDF) 25 Page - STMicroelectronics |
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PSD813F1AV-12MIT データシート(HTML) 25 Page - STMicroelectronics |
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25 / 110 page  25/110 PSD813F1V Writing the OTP Row Writing to the OTP row (64 bytes) can only be done once per byte, and is enabled by an instruc- tion. This instruction is composed of three specific WRITE operations of data bytes at three specific memory locations followed by the data to be stored in the OTP row (refer to Table 8., page 20). During the WRITE operations, address bit A6 must be zero, while address bits A5-A0 define the OTP Row byte to be written while any EEPROM Sector Select signal (EESi) is active. Writing the OTP Row is allowed only when SDP mode is not en- abled. Figure 7. EEPROM SDP Enable Flowcharts WRITE AAh to Address 555h WRITE 55h to Address AAAh WRITE A0h to Address 555h SDP is set Page Write Instruction SDP ENABLE ALGORITHM WRITE AAh to Address 555h WRITE 55h to Address AAAh WRITE A0h to Address 555h Page Write Instruction SDP Set SDP not Set WRITE is enabled WRITE Data to be Written in any Address Write in Memory Write Data + SDP Set after tWC (Write Cycle Time) ai09219 |
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