ADMV1010AEZ-R7 datasheet(18/21 Pages) AD

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ADMV1010

Data Sheet

Rev. B | Page 18 of 21

EVALUATION BOARD

The circuit board used in the application must use RF circuit

design techniques. Signal lines must have 50 Ω impedance, and

the package ground leads and exposed pad must be connected

directly to the ground plane similarly to that shown in Figure 48

and Figure 49. Use a sufficient number of via holes to connect

the top and bottom ground planes. The evaluation circuit board

shown in Figure 50 is available from Analog Devices upon

request.

Layout

Solder the exposed pad on the underside of the ADMV1010 to

a low thermal and electrical impedance ground plane. This pad

is typically soldered to an exposed opening in the solder mask

on the evaluation board. Connect these ground vias to all other

ground layers on the evaluation board to maximize heat dissi-

pation from the device package. Figure 48 shows the printed

circuit board (PCB) land pattern footprint for the ADMV1010-

EVALZ, and Figure 49 shows the solder paste stencil for the

ADMV1010-EVALZ.

0.138" SQUARE MASK OPENING

0.02 × 45° CHAMFER FOR PIN 1

0.197"

[0.50]

PAD SIZE

0.026" × 0.010"

0.217" SQUARE

0.004" MASK/METAL OVERLAP

0.010" MINIMUM MASK WIDTH

0.010" REF

0.030"

MASK OPENING

0.156"

MASK

OPENING

PIN 1

GROUND PAD

SOLDER MASK

0.146" SQUARE

GROUND PAD

ø.010"

TYPICAL VIA

ø.034"

TYPICAL

VIA SPACING

Figure 48. PCB Land Pattern Footprint of the ADMV1010-EVALZ

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