PIN

NAME

FUNCTION

1

2

RESET

Open-Drain RESET Output. The RESET output is driven low if FB drops below 92.5% of its set value.

RESET

goes high 1024 clock cycles after FB rises above 95.5% of its set value. See the RESET Output

section for more details.

3

RT

Switching Frequency Programming. Connect a resistor from RT to SGND to set the regulator's

switching frequency. Leave RT open for the default 450kHz frequency. See the Setting the Switching

Frequency (RT) section for more details.

4

SGND

Analog Ground.

5

CF

Compensation Pin. Connect a 2.2pF capacitor from CF to FB.

6

FB

Feedback Input. Connect FB to the center tap of an external resistor-divider from the OUT to SGND to

set the output voltage.

Pin Configuration

FB

CF

RT

PGND

SGND

PGND

IN

OUT

OUT

PGND

PGND

PGND

10

16

17

18

20

21

28

22

23

EP1

14

15

13

19

5

4

3

2

24

IN

1

9

8

7

6

SS

27

12

EXTVCC

PGND

BST

29

DL

EP3

25

26

11

PGND

OUT

EP2

PGND

PGND

PGND

LX

+

OUT

MAXM17536

RESET

29-PIN SiP

(9mm x 15mm x 4.32mm)

EN/UVLO

MODE/SYNC

Pin Description

www.maximintegrated.com

Maxim Integrated │ 12

MAXM17536

4.5V to 60V, 4A High-Efficiency, DC-DC Step-Down

SiP Power Module with Integrated Inductor