FUSB3307 datasheet(16/21 Pages) ONSEMI

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FUSB3307

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When a Sink device is connected via the USB−C

connector, as mentioned above, the FUSB3307 will detect

a legitimate Type C attach and drive the GATE pin to turn on

the VBUS load switch Q1. The initial voltage on VBUS is

always 5 V (4.75 V to 5.5 V voltage range) and the CC pin

will advertise 3 A capability which is the maximum power

allowed by a Type C (without PD) port. FUSB3307 is not

expected to be used below 15 W power level since

ON Semiconductor has other Type C only controllers such

as the FUSB303. Subsequent to the initial attach, the

FUSB3307 will send out PD packets to advertise source

capabilities as selected by the trim options in Table 6. Using

the Default FUSB3307 Trim options, the FUSB3307 will

source 60 W by sending out a PD Source_Capabilities

message on the CC line (either CC1 or CC2 depending on

connector plug orientation) using PD communication

messages. The supplies advertised for the default trim option

are fixed supplies and PPS supplies shown in Table 7:

Table 7. DEFAULT TRIM OPTION ADVERTISED PD SOURCE CAPABILITIES

[Augmented] Power Data Object

Output Voltage

Maximum Sink Current Expected

Current Protection

PDO1

5 V

3 A

Over Current Protection

PDO2

9 V

3 A

Over Current Protection

PDO3

12 V

3 A

Over Current Protection

PDO4

15 V

3 A

Over Current Protection

PDO5

20 V

3 A

Over Current Protection

APDO1

3.3 V min, 21 V max

3 A

Current Limit Protection

The Sink will select one of these offerings and enter into

a PD explicit contract with the FUSB3307 which is the first

step of all subsequent PD communication. If the Sink selects

an illegal data object number or requests an illegal current

level, the FUSB3307 will reject the request. A short amount

of time after this reject message is sent, the FUSB3307 will

resend its Source_Capabilties message and expect a valid

request.

If a 5 A capability is chosen from the trim table (Table 6)

above then the FUSB3307 will use USB PD Discover

Identity messages to interrogate the capabilities of the cable

attached to it to ensure that it is a 5 A capable cable before

the FUSB3307 advertises 5 A source capabilities. The

FUSB3307 supplies the VCONN power needed to support

this discovery process as specified in the USB PD and

Type C specification which eliminates the need for an

external VCONN power source and multiple power

switches. If the cable is only 3 A, even though the

FUSB3307 can support 5 A, the advertised capabilities will

all drop down to 3 A. This will be done on the first source

capabilities advertised but there is an indication in the USB

PD Status message sent to indicate that the source is 5 A

capable but the cable has limited the source capabilities to

3 A. In Table 8 the section of the SOP Status Data Block

(SDB) is shown that communicates this power limitation.

Table 8. PD Status Message to Sink Showing Power is

Limited by the Cable

Offset

Field

Bit

Description

Power

Status

...

Source power limited due to

cable supported current

...

6...7

...

The FUSB3307 follows all USB PD specifications

including dropping down to USB PD 2.0 operation when it

detects a USB PD 2.0 Sink and a USB PD 2.0 cable eMarker

(if applicable). All subsequent operation will follow the

USB PD 2.0 specification until the FUSB3307 is reset via a

Hard Reset message or undergoes a power cycle.

Standby Operation

When the FUSB3307 is in standby, where the source

power supply still has to be maintained at 5 V via the CATH

pin for a typical Type C connection but no Sink device has

been attached to the FUSB3307, then the current consumed

is just ICC−GREEN ( < 870

mA typical). This low standby

current allows for all the energy standard specifications to be

well exceeded for offline designs (typically the FUSB3307

within the offline design can achieve 21 mW standby

power).

PDIV0, PDIV1 and PDIV2 Options

FUSB3307 can adjust the output power from the trim

table (Table 6) to have any PDP (Power Delivery Power)

from 16 W to 100 W (called TrimPDP here) in 1 W

increments. However, in some applications in may be

advantageous to trim all FUSB3307 devices to 60 W PDP

and use them in both single port and dual port

configurations. For the dual port configuration, the PDP

would need to be halved for assured capacity charger ports

and PDIV2 pin does just that – cuts the trimmed 60 W PDP

in half to 30 W. For further divider ratios, PDIV1 and PDIV0

can be used as well.

PDIV2 is available only in the QFN version of the

FUSB3307 while PDIV0 and PDIV1 share their

functionality with the D− and D+ pins respectively in both

the QFN and SOIC package options. For the PDIV2 pin, the

selection of power is shown in Table 9.

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