ACE24LA128A

Two-wire Serial EEPROM

VER 1.1

4

Pin Descriptions

Device/Page Addresses (A2, A1 and A0):

The A2, A1 and A0 pins are device address inputs that are hard wire for the ACE24LA128A. Eight

128evices may be addressed on a single bus system (device addressing is discussed in detail under the

Device Addressing section).

Serial Data (SDA):

The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed

with any number of other open-drain or open- collector devices.

Serial Clock (SCL):

The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock

data out of each device.

Write Protect (WP):

The ACE24LA128A has a Write Protect pin that provides hardware data protection.

The Write Protect pin allows normal read/write operations when connected to ground (GND). When the

Write Protection pin is connected to Vcc the write protection feature is enabled and operates as shown in

the following Table 1.

Table 1. Write Protect

WP Pin Status

Part of the Array Protected

ACE24LA128A

Full (128K) Array

At GND

Normal Read / Write Operations

Memory Organization

ACE24LA128A, 128K SERIAL EEPROM: Internally organized with 256 pages of 64 bytes each, the 128K

requires a 14-bit data word address for random word addressing.

Device Operation

Clock and Data Transitions:

The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during

SCL low time periods (see Figure 1). Data changes during SCL high periods will indicate a start or stop

condition as defined below.

Start Condition:

A high-to-low transition of SDA with SCL high is a start condition which must precede any other command

(see Figure 2).