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ICS162835 データシート(PDF) 6 Page - Integrated Circuit Systems

部品番号 ICS162835
部品情報  18-Bit 3.3V Registered Buffer
PDF  7 Pages
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メーカー  ICST [Integrated Circuit Systems]
ホームページ  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS162835 データシート(HTML) 6 Page - Integrated Circuit Systems

  ICS162835 Datasheet HTML 1Page - Integrated Circuit Systems ICS162835 Datasheet HTML 2Page - Integrated Circuit Systems ICS162835 Datasheet HTML 3Page - Integrated Circuit Systems ICS162835 Datasheet HTML 4Page - Integrated Circuit Systems ICS162835 Datasheet HTML 5Page - Integrated Circuit Systems ICS162835 Datasheet HTML 6Page - Integrated Circuit Systems ICS162835 Datasheet HTML 7Page - Integrated Circuit Systems  
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6
ICS162835
Advance Information
0713—09/23/02
5
IN PUT
VIH
0V
VOH
VOL
tPLH1
tSK (x)
OU TPUT 1
OU TPUT 2
tPHL1
tSK (x)
tPLH2
tPHL2
VT
VT
VOH
VT
VOL
tSK(x) = tPLH2 - tPLH1 or tPH L2 - tPHL1
LOW -H IGH -LOW
PU LSE
H IGH -LOW -H IGH
PU LSE
VT
tW
VT
CONTROL
IN PUT
tPLZ
0V
OU TPU T
NORM ALLY
LOW
tPZH
0V
SW ITCH
CLO SE D
OU TPU T
NORM ALLY
HIGH
EN ABLE
DISABLE
SW ITCH
OPEN
tPHZ
0V
VLZ
VOH
VT
VT
tPZL
VLOAD/2
VLOAD/2
VIH
VT
VOL
VHZ
NOTES:
Switching Waveforms
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
ENABLE AND DISABLE TIMES
OUTPUT SKEW - tSK(X)
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
PULSE WIDTH
An
CK
Yn
tPLH
tPHL
VIH
VIL
VIH
VIL
VOH
VOL
An
CK
Yn
tS
tS
VIH
VIH
VIL
VIH
VIL
VOH
VOL
An
CK
Yn
tH
tH
VIH
VIL
VIH
VIL
VOH
VOL
HOLD TIME MEASUREMENTS
PROPAGATION DELAY MEASUREMENT
SETUP TIME MEASUREMENTS



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