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AM652X データシート(PDF) 174 Page - Texas Instruments |
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AM652X データシート(HTML) 174 Page - Texas Instruments |
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174 / 282 page  7.9.5.6.2 eCAP Switching Characteristics NO. PARAMETER DESCRIPTION MIN MAX UNIT CAP2 tw(APWM) Pulse duration, APWMx -3 + 2P (1) ns (1) P = sysclk period in ns. APWM CAP2 EPERIPHERALS_TIMNG_02 Figure 7-42. eCAP Switching Characteristics For more information, see section Enhanced Capture (ECAP) Module in the device TRM. 7.9.5.7 ePWM The supported features by the device ePWM are: • Dedicated 16-bit time-base counter with period and frequency control • Two independent PWM outputs which can be used in different configurations (with single-edge operation, with dual-edge symmetric operation or one independent PWM output with dual-edge asymmetric operation) • Asynchronous override control of PWM signals during fault conditions • Programmable phase-control support for lag or lead operation relative to other EPWM modules • Dead-band generation with independent rising and falling edge delay control • Programmable trip zone allocation of both latched and un-latched fault conditions • Events enabling to trigger both CPU interrupts and start of ADC conversions Table 7-36 represents ePWM timing conditions. Table 7-36. ePWM Timing Conditionns PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 1 4 V/ns OUTPUT CONDITIONS CL Output load capacitance 2 7 pF Section 7.9.5.7.1 and Section 7.9.5.7.2 present timing and switching characteristics for eHRPWM (see Figure 7-43, Figure 7-44, Figure 7-45, and Figure 7-46). 7.9.5.7.1 ePWM Timing Requirements NO. PARAMETER DESCRIPTION MIN MAX UNIT PWM6 tw(SYNCIN) Pulse duration, eHRPWM_SYNCI 3 + 2P (1) ns PWM7 tw(TZ) Pulse duration, eHRPWM_TZn_IN low 3 + 3P (1) ns (1) P = sysclk period in ns AM6548, AM6528, AM6526 SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021 www.ti.com 174 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: AM6548 AM6528 AM6526 |
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