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PCF8564A データシート(PDF) 40 Page - NXP Semiconductors |
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PCF8564A データシート(HTML) 40 Page - NXP Semiconductors |
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40 / 86 page ![]() NXP Semiconductors PCA2131 Nano-power highly accurate RTC with integrated quartz crystal for automotive applications Bit Register 7 6 5 4 3 2 1 0 Control_2 1 0 1 1 0 0 0 0 Table 61. Example values in register Control_2 The following tables show what instruction must be sent to clear the appropriate flag. Bit Register 7 6 5 4 3 2 1 0 Control_2 1 0 1 0 0 0[1] 0[1] 0 Table 62. Example to clear only AF (bit 4) [1] The bits labeled as - have to be rewritten with the previous values. Bit Register 7 6 5 4 3 2 1 0 Control_2 0 0 1 1 0 0[1] 0[1] 0 Table 63. Example to clear only MSF (bit 7) [1] The bits labeled as - have to be rewritten with the previous values. 7.12 Timestamp function The PCA2131 has four active LOW timestamp input pins TS1, TS2, TS3 and TS4, internally pulled with on-chip pull-up resistors to Voper(int). It also has a timestamp detection circuit which can detect the event when inputs on pin TS1/2/3/4 are driven to ground. The timestamp function is enabled by default after power-on and it can be switched off by setting the control bit TSOFF (register Timestp_ctl1/2/3/4). The time recorded in the time stamps, when in 100 Hz disable mode (1 Hz mode), will be at least two 16 Hz clocks behind the timestamp event and no more than 3 clocks behind. If the exact time of the timestamp event is required then subtract 2 subseconds from the timestamp value and the result will have -0 subseconds to +1 subseconds of uncertainty. A most common application of the timestamp function is described in [1]. See Section 7.13.5 for a description of interrupt generation from the timestamp function. 7.12.1 Timestamp flag 1. When the TS1/2/3/4 input pin are driven to ground, the following sequence occurs: a. The actual date and time are stored in the timestamp registers. b. The timestamp flag TSF1/2/3/4 flag is set. c. If the TSIE1/2/3/4 bit is active, and corresponding interrupt mask is disabled, an interrupt on the INTA/B pin is generated. The TSF1/2/3/4 and TSF1/2/3/4_2 flags can be cleared by command; clearing the flag clears the interrupt. Once TSF1/2/3/4 is cleared, it will only be set again when TS1/2/3/4 pin is driven to ground once again. PCA2131 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 1.0 — 26 July 2021 40 / 86 |
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